DocumentCode
2355288
Title
Analysis of noise isolation methods on split power/ground plane of multi-layered package and PCB for low jitter mixed mode system
Author
Jeong, Youchul ; Kim, Hyungsoo ; Kim, Jingook ; Park, Jongbae ; Kim, Joungbo
Author_Institution
Dept. of Electr. Eng. & Comput. Sci., Korea Adv. Inst. of Sci. & Technol., Daejon, South Korea
fYear
2003
fDate
27-29 Oct. 2003
Firstpage
199
Lastpage
202
Abstract
Various noise isolation methods for low jitter on the power/ground plane are thoroughly analyzed and a new method is proposed. We analyzed using both frequency and time domain measurement methods and the results were verified by jitter measurements.
Keywords
circuit noise; electric noise measurement; jitter; network analysis; printed circuit testing; PCB split power/ground plane; frequency domain measurement; jitter measurement; low jitter mixed mode system; multilayered package; noise isolation methods; time domain measurement; Analog circuits; Circuit noise; Impedance measurement; Isolation technology; Jitter; Neck; Noise measurement; Packaging; Testing; Time measurement;
fLanguage
English
Publisher
ieee
Conference_Titel
Electrical Performance of Electronic Packaging, 2003
Conference_Location
Princeton, NJ, USA
Print_ISBN
0-7803-8128-9
Type
conf
DOI
10.1109/EPEP.2003.1250031
Filename
1250031
Link To Document