DocumentCode :
235562
Title :
Challenges of CMP manufacturability in advanced nodes
Author :
Lai, Jiun Yu
Author_Institution :
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu Science and Industrial Park, Taiwan
fYear :
2014
fDate :
19-21 Nov. 2014
Firstpage :
61
Lastpage :
61
Abstract :
Chemical Mechanical Polishing is wildly adopted in semiconductor manufacturing processes to achieve planarity requirements for 2D or 3D integrated circuit structures. The stringent requirements of precise process control and defect reduction in various CMP processes not only affect device performance and yield, but also post challenges in high volume manufacturing. Additionally, the complexity of materials polished drives the innovation on CMP consumable. The quality control of new consumables grows more important than ever to affect process window and production line robustness. Examples to illustrate these challenges in HVM environment in advanced nodes are addressed and possible solution paths are discussed. Close collaboration between users and vendors in the whole supply chain is required to tackle these challenges to enhance the CMP manufacturability in the new era.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Planarization/CMP Technology (ICPT), 2014 International Conference on
Conference_Location :
Kobe, Japan
Print_ISBN :
978-1-4799-5556-5
Type :
conf
DOI :
10.1109/ICPT.2014.7017245
Filename :
7017245
Link To Document :
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