PILOT: a fast algorithm for enhanced 3D parasitic extraction efficiency

Author

Gope, DipanIan ; Jandhyala, Vikram

Author_Institution

Dept. of Electr. Eng., Univ. of Washington, Seattle, WA, USA

fYear

2003

fDate

27-29 Oct. 2003

Firstpage

337

Lastpage

340

Abstract

Integral equation methodologies applied to extract parasitics at the board, package, and on-chip levels involve solving a dense system of equations. In this paper, we present an improved oct-tree based multilevel QR compression technique for fast iterative solution. The regular tree and interaction structure of the fast multipole method, and the QR compression scheme applied to interaction sub-matrices as in IES/sup 3/ are combined to achieve superior time and memory efficiency. As is demonstrated by numerical simulation results presented herein, the new algorithm is found to be faster than both existing QR based methods and FastCap.

Keywords

Poisson equation; circuit CAD; circuit analysis computing; computational complexity; iterative methods; method of moments; octrees; singular value decomposition; 3D parasitic extraction; PILOT; Poisson equation; SVD; enhanced efficiency; fast algorithm; fast iterative solution; fast multipole method; interaction submatrices; memory efficiency; method of moments; multilevel QR compression; numerical simulation; predetermined interaction list octree algorithm; Capacitance; Conductors; Costs; Dielectrics; Integral equations; Iterative algorithms; Kernel; Message-oriented middleware; Poisson equations; Testing;

fLanguage

English

Publisher

ieee

Conference_Titel

Electrical Performance of Electronic Packaging, 2003

Conference_Location

Princeton, NJ, USA

Print_ISBN

0-7803-8128-9

Type

conf

DOI

10.1109/EPEP.2003.1250063

Filename

1250063