Implementation and testing of fault-tolerant photodiode-based active pixel sensor (APS)

The implementation of imaging arrays for system-on-a-chip (SOC) is aided by using fault-tolerant light sensors. Fault-tolerant redundancy in an active pixel sensor (APS) is obtained by splitting the photodiode and readout transistors into two parallel operating devices, while keeping a common row select transistor. This creates a redundant APS that is self-correcting for most common faults. Simulations suggest that, by combining hardware fault-tolerance capability with software correction, active pixel sensor arrays could be virtually immune to defects. To test this concept in hardware, a fault-tolerant photodiode APS was designed and fabricated using a CMOS 0.18 μm process. Testing included both fully functional APS, and those in which various failure modes and mechanisms are introduced (equivalent to stuck low and stuck high faults). Test results show that the output voltage for the stuck high case and the stuck low case varies linearly with light intensity. For the stuck low case, the sensitivity is 0.57 of that for a non-defective redundant APS, and the stuck high case is 0.40. These deviate from the theoretical value of 0.5 by +14% and -20% respectively.