Effective surface design for reduced scratches on CMP

Scratches are the most common defect in typical CMP (Chemical Mechanical Planarization) Processing. Since the micro and macro scratches during CMP processing directly affect the yield and reliability in IC devices, many fields of engineers and researchers have tried to eliminate these troublesome scratches. Numerous root causes and methods were discussed and introduced to at this site, but still scratches are the top on the defect list in overall integration failure analysis. The most important thing is to understand 2-body and 3-body contact phenomena in each different polishing process. And control of irregular and instantaneous stress concentration on specific wafer areas are key points to minimize the scratch defects. It´s difficult to catch the tribological phenomena in real polishing, it could be estimated based on consumable analysis like simplifiing experimental tools and analysis results of used consumables. It was found that each consumable, such as pad, disk and slurry, should be changed and redesigned based on the full understanding of CMP polisher configuration. In this talk, several fundamental study and effective ways for reducing scrathes will be introduced and discussed.