• DocumentCode
    2356801
  • Title

    Systolic implementation of Kalman filter

  • Author

    Chen, Sau-Gee ; Lee, Jiann-Cherng ; Li, Chieh-Chih

  • Author_Institution
    Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsinchu, Taiwan
  • fYear
    1994
  • fDate
    5-8 Dec 1994
  • Firstpage
    97
  • Lastpage
    102
  • Abstract
    Several new real-time systolic implementations for three popular Kalman filtering algorithms are presented. These architectures are all composed of two units of systolic arrays, where the first one is based on three new, systolic arrays for matrix multiplications and additions, while the second one is a conventional systolic array for matrix inversion. Mathematical formulations of the three Kalman filtering algorithms are scheduled for the best deployment of those systolic arrays. This results in nine new systolic Kalman filters. Among them, one has the best performances in both speed and hardware complexities among the existing architectures. Specifically, this architecture has a smaller number of O(2n2) PEs than O(2.5n2) PEs of the best known structures, and a highest throughput rate
  • Keywords
    Kalman filters; filtering theory; matrix inversion; matrix multiplication; parallel algorithms; real-time systems; systolic arrays; Kalman filter; hardware complexities; matrix additions; matrix inversion; matrix multiplications; real-time systolic implementations; throughput rate; Control systems; Covariance matrix; Delay; Equations; Filtering algorithms; Hardware; Kalman filters; Signal processing algorithms; Systolic arrays; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
  • Conference_Location
    Taipei
  • Print_ISBN
    0-7803-2440-4
  • Type

    conf

  • DOI
    10.1109/APCCAS.1994.514531
  • Filename
    514531