DocumentCode
2356914
Title
Generalized methodology for array processor design of real-time systems
Author
El-Hadidy, F. Moelaert ; Herrmann, O.E.
Author_Institution
Lab. for Network Theory, Twente Univ., Enschede, Netherlands
fYear
1994
fDate
5-8 Dec 1994
Firstpage
145
Lastpage
150
Abstract
Many techniques and design tools have been developed for mapping algorithms to array processors. Linear mapping is usually used for regular algorithms. Large and complex problems are not regular by nature and regularization may cause a computational overhead which prevents the ability to meet real-time deadlines. In this paper, a systematic design methodology for mapping partially-regular as well as regular Dependence Graphs is presented. In this approach the set of all optimal solutions is generated under the given constraints. Due to nature of the problem and the tight timing constraints of real-time systems the set of alternative solutions is limited. An image processing example is discussed
Keywords
graph theory; parallel algorithms; parallel processing; real-time systems; algorithm mapping; array processors; design methodology; image processing; partially-regular dependence graphs; real-time systems; regular dependence graphs; Algorithm design and analysis; Design methodology; Image processing; Laboratories; Network theory (graphs); Process design; Processor scheduling; Real time systems; Signal processing algorithms; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
Conference_Location
Taipei
Print_ISBN
0-7803-2440-4
Type
conf
DOI
10.1109/APCCAS.1994.514539
Filename
514539
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