Title :
An integrated design approach for self-checking FPGAs
Author :
Bolchini, C. ; Salice, F. ; Sciuto, D. ; Zavaglia, R.
Author_Institution :
Dip. Elettronica e Informazione, Politecnico di Milano, Italy
Abstract :
This paper proposes a methodology for designing FPGAs able to self-detect the occurrence of hardware failures, integrated in a standard, industrial design flow. The approach improves the results proposed in the past, by defining a testing environment which takes into account the peculiarities of FPGA platforms.
Keywords :
built-in self test; fault tolerance; field programmable gate arrays; integrated circuit reliability; logic design; logic testing; FPGA platform testing environment; fault tolerance; hardware failure self-detection; on-line testing capability; self-checking FPGA design; Circuit faults; Design methodology; Field programmable gate arrays; Logic circuits; Logic testing; Multiprocessor interconnection networks; Programmable logic arrays; Prototypes; Switches; System testing;
Conference_Titel :
Defect and Fault Tolerance in VLSI Systems, 2003. Proceedings. 18th IEEE International Symposium on
Print_ISBN :
0-7695-2042-1
DOI :
10.1109/DFTVS.2003.1250142
