Conformal low -temperature dielectric deposition process below 200°C for TSV application

Author

Praveen, Sampath Kumar ; Tsan, Ho Wai ; Nagarajan, Ranganathan

Author_Institution

Inst. of Microelectron., A*STAR (Agency for Sci., Technol. & Res.), Singapore, Singapore

fYear

2010

fDate

8-10 Dec. 2010

Firstpage

27

Lastpage

30

Abstract

A detailed study to perform low temperature (<; 200°C) PECVD TEOS-oxide deposition process with very low mechanical stress and good conformal deposition on high aspect ratio features (10:1) was done. Individual conditions that affect the oxide stress and deposition rate such as TEOS & O₂ flow rate, HF/LF power, pressure and temperature are investigated. The optimal conditions found are used to then deposited into trenches and further fine tuned to give excellent step coverage for high aspect ratio features.

Keywords

cryogenics; dielectric properties; integrated circuit packaging; plasma CVD; three-dimensional integrated circuits; HF-LF power; PECVD TEOS-oxide deposition process; TSV; aspect ratio; conformal low-temperature dielectric deposition process; mechanical stress; plasma enhanced chemical vapor deposition; tetraethylorthosilicate; Dielectrics; Films; Plasma temperature; Stress; Temperature measurement; Through-silicon vias;

fLanguage

English

Publisher

ieee

Conference_Titel

Electronics Packaging Technology Conference (EPTC), 2010 12th

Conference_Location

Singapore

Print_ISBN

978-1-4244-8560-4

Electronic_ISBN

978-1-4244-8561-1

Type

conf

DOI

10.1109/EPTC.2010.5702600

Filename

5702600