A logarithmic digital-analog converter for digital CMOS technology

Author

Guilherme, Jorge ; Franca, José E.

Author_Institution

Dept. of Electr. & Comput. Eng., Inst. Superior Tecnico, Lisbon, Portugal

fYear

1994

fDate

5-8 Dec 1994

Firstpage

490

Lastpage

493

Abstract

This paper describes the design and integrated circuit implementation of a logarithmic digital-to-analogue converter employing a digitally-controlled current attenuator whose accuracy depends solely on the matching of transistors. An 8-bit resolution, 80 dB dynamic range prototype chip fabricated in a 1.2 μm digital CMOS technology occupies 1.5 mm² and at 5 V supply and 1 MHz conversion rate dissipates 6 mW

Keywords

CMOS integrated circuits; attenuators; digital-analogue conversion; 1 MHz; 1.2 micron; 5 V; 6 mW; 8 bit; conversion rate; digital CMOS technology; digitally-controlled current attenuator; dynamic range; logarithmic digital-analog converter; resolution; transistor matching; Attenuation; Attenuators; CMOS technology; Digital integrated circuits; Digital-analog conversion; Dynamic range; Integrated circuit technology; Prototypes; Resistors; Switching converters;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on

Conference_Location

Taipei

Print_ISBN

0-7803-2440-4

Type

conf

DOI

10.1109/APCCAS.1994.514599

Filename

514599

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=2357923