DocumentCode :
2358122
Title :
A segment rearrangement approach to channel routing under the crosstalk constraints
Author :
Jhang, Kyoung-Son ; Ha, Soonhoi ; Jhon, Chu Shik
Author_Institution :
Dept. of Comput. Eng., Seoul Nat. Univ., South Korea
fYear :
1994
fDate :
5-8 Dec 1994
Firstpage :
536
Lastpage :
541
Abstract :
The inter-wire spacing in a VLSI chip becomes closer as the VLSI fabrication technology rapidly evolves. Accordingly, it becomes important to consider crosstalk caused by the coupling capacitance between adjacent wires in the layout design for the fast and safe VLSI circuits. The upper bounds of allowable crosstalks, called crosstalk constraint, are usually given for each net in the design specification. This paper presents a segment rearrangement approach to channel routing to satisfy all the crosstalk constraints. Starting from the given routing, the proposed technique repeatedly rearranges the horizontal wire segments around the nets that violate the crosstalk constraints to reduce crosstalk. Our objective is to find a routing with the minimum number of tracks under crosstalk constraints. With experiments, we observed the presented technique is more effective than the track permutation technique
Keywords :
VLSI; circuit layout CAD; crosstalk; integrated circuit layout; network routing; IC layout design; VLSI chip; channel routing; coupling capacitance; crosstalk constraints; horizontal wire segments; inter-wire spacing; segment rearrangement; Capacitance; Cost function; Coupling circuits; Crosstalk; Fabrication; Linear programming; Routing; Upper bound; Very large scale integration; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1994. APCCAS '94., 1994 IEEE Asia-Pacific Conference on
Conference_Location :
Taipei
Print_ISBN :
0-7803-2440-4
Type :
conf
DOI :
10.1109/APCCAS.1994.514608
Filename :
514608
Link To Document :
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