Lead delamination correlation with Sn layer melting during sawing in power QFN package

Many of the semiconductor components used extensively in today´s industrial and multimedia market are beginning to migrate from traditional leaded frame designs to non-leaded QFN designs. This packaging method of map molded could reduce thermal resistance, less size for packaging & weight, suitable for medium or small pads IC with high speed & high frequency applications for products. This map molded packaging method has resulted in a shift from traditional punching techniques to sawing technique and it can reduce the manufacturing cost and increase the flexibility of designing a package. This paper describes the development of multichip power QFN package which comprises three die pads and total of forty lead counts. This paper described the lead delamination correlation with Sn layer melting.