Title :
Comprehensive study and corresponding improvements on the ESD robustness of different nLDMOS devices
Author :
Yuan Wang ; Guangyi Lu ; Lizhong Zhang ; Jian Cao ; Song Jia ; Xing Zhang
Author_Institution :
Inst. of Microelectron., Peking Univ., Beijing, China
fDate :
June 30 2014-July 4 2014
Abstract :
Four-terminal and three-terminal asymmetrical n-type LDMOS (asym-nLDMOS) devices are investigated in 0.18μm 40V SOI BCD technology. To improve normal asym-nLDMOS devices ESD robustness, an additional p-sink implant is added beneath their source/drain diffusion regions. Transmission line pulse measured results show that the novel asym-nLDMOS devices have a suitable triggering voltage and 30-48% improvement of second breakdown current.
Keywords :
BIMOS integrated circuits; MOSFET; electrostatic discharge; silicon-on-insulator; transmission lines; ESD robustness; SOI BCD technology; Si; breakdown current; four-terminal asymmetrical n-type LDMOS devices; p-sink implant; size 0.18 mum; source-drain diffusion regions; three-terminal asymmetrical n-type LDMOS devices; transmission line pulse; triggering voltage; voltage 40 V; Breakdown voltage; Electrostatic discharges; Junctions; Robustness; Substrates; Testing; Thyristors;
Conference_Titel :
Physical and Failure Analysis of Integrated Circuits (IPFA), 2014 IEEE 21st International Symposium on the
Conference_Location :
Marina Bay Sands
Print_ISBN :
978-1-4799-3931-2
DOI :
10.1109/IPFA.2014.6898177
