• DocumentCode
    235871
  • Title

    Non-destructive techniques for internal solder bump inspection of chip scale package-ball grid array package

  • Author

    Lagar, Jason H. ; Sia, Rudolf A. ; Grancapal, Marlyn C.

  • Author_Institution
    Analog Devices, Inc., Cavite, Philippines
  • fYear
    2014
  • fDate
    June 30 2014-July 4 2014
  • Firstpage
    362
  • Lastpage
    365
  • Abstract
    Non-destructive inspection of Chip Scale Package-Ball Grid Array (CSP-BGA) package for anomalies related to continuity test failures specifically on the internal solder bumps, which connect the die to the Printed Circuit Board (PCB) substrate, is a challenge. Curve trace analysis can trace which internal solder bumps are involved but confirming its physical status needs more reliable and advanced nondestructive techniques. C-mode Scanning Acoustic Microscopy (CSAM) and Micro-Computed Tomography (μCT) scan were evaluated. Results of this paper showed that depending on the physical attribute of the bump anomaly, it could be seen either in μCT scan or CSAM. μCT scan will show those solder bumps with abnormal size or formation and CSAM using a 100 MHz transducer will show those bumps which fractured from its die pad connection. μCT scan can also be utilized for inspecting the metal traces, through hole vias and external solder balls of the PCB substrate. With these two non-destructive techniques, conventional destructive physical analysis techniques like mechanical cross-section, delayering and deprocessing are no longer required saving cycle time and cost. The samples are also saved for further electrical verification, fault isolation and destructive die-level physical analysis, if needed.
  • Keywords
    acoustic microscopy; ball grid arrays; chip scale packaging; nondestructive testing; solders; C-mode scanning acoustic microscopy; ball grid array package; chip scale package; curve trace analysis; internal solder bump inspection; microcomputed tomography; nondestructive techniques; Acoustics; Computed tomography; Failure analysis; Microscopy; Silicon; Substrates; Transducers;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Physical and Failure Analysis of Integrated Circuits (IPFA), 2014 IEEE 21st International Symposium on the
  • Conference_Location
    Marina Bay Sands
  • ISSN
    1946-1542
  • Print_ISBN
    978-1-4799-3931-2
  • Type

    conf

  • DOI
    10.1109/IPFA.2014.6898178
  • Filename
    6898178