Reduction of crosstalk in RC modeled interconnects with low power encoder

This paper presents a novel circuit for simultaneous reduction of power, crosstalk and area using bus encoding technique in RC modeled VLSI interconnect. Bus-invert method has been used to reduce inter-wire coupling which is primary source of power dissipation, crosstalk and delay in coupled interconnects. The proposed method focuses on simplified and improved circuit of encoder for 4, 8 and 16 coupled lines. Previously used encoding schemes based on RC models had usually focused on only minimizing power dissipation and crosstalk while paying penalty in terms of chip area. However, our proposed encoder and decoder demonstrate an overall reduction in power dissipation, crosstalk by 57% through drastically reducing switching activity. Furthermore, the complexity, chip area and transistor count of the circuit is reduced by more than 55%.