Title :
Comparison of verification methodologies for datapath testing
Author_Institution :
Somerset Design Center, Motorola Inc., Austin, TX, USA
Abstract :
Verification of individual components of a system on a chip (SOC) has become ever more complex, with the added requirement that individual verification environments need to work well with system level environments to reduce verification time. Two of the often used approaches towards unit verification are memory image based data checking and port-to-port data checking. We compare and evaluate these approaches with respect to the rest of the environment, the logic under test and other relevant issues.
Keywords :
data integrity; logic testing; system-on-chip; SOC; datapath testing; logic testing; memory image based data checking; port-to-port data checking; system level verification; system on chip verification; Clocks; Conferences; Logic devices; Logic testing; Master-slave; Microprocessors; Random access memory; System testing; System-on-a-chip;
Conference_Titel :
Microprocessor Test and Verification: Common Challenges and Solutions, 2003. Proceedings. 4th International Workshop on
Print_ISBN :
0-7695-2045-6
DOI :
10.1109/MTV.2003.1250259