DocumentCode :
2359516
Title :
Crack and damage in low-k BEoL stacks under assembly and CPI aspects
Author :
Auersperg, J. ; Vogel, D. ; Lehr, M.U. ; Grillberger, M. ; Michel, B.
Author_Institution :
Fraunhofer ENAS, Chemnitz, Germany
fYear :
2010
fDate :
26-28 April 2010
Firstpage :
1
Lastpage :
6
Abstract :
Miniaturization and increasing functional integration as the electronic industry drives push the development of feature sizes down to the nanometer range. Moreover, harsh operational conditions and new porous or nano-particle filled materials introduced on both chip and package level - low-k and ultra low-k materials in Back-end of line (BEoL) layers of advanced CMOS technologies, in particular - cause new challenges for reliability analysis and prediction. The authors show a combined numerical/experimental approach and results towards optimized fracture and fatigue resistance of those BEoL structures under manufacturing/packaging (during lead-free reflow-soldering, in particular) as well as chip package interaction (CPI) aspects by making use of bulk and interface fracture concepts, in multi-scale and multi-failure modeling approaches with several kinds of failure/fatigue phenomena. Probable crack paths and interactions between material damaging and interface fracture will be investigated and sensitivities with regard to structural modifications studied. Complementary to the simulation side of reliability estimations, serious issues are connected with the collection of appropriate material properties in the miniaturized range addressed - Young´s modulus, initial yield stress, hardening. Nano-indentation, AFM, FIB and EBSD provide these desired properties, in particular. In addition, manufacturing induced residual stresses in the Back-end layer stack have an essential impact on damage behavior, because they superpose functional and CPI loads. Their determination with a spatial resolution necessary for typical BEoL structure sizes is a critical issue. The nano-scale stress relief technique (fibDAC) makes use of tiny trenches placed with a focused ion beam (FIB) equipment at the position of stress measurement. Digital image correlation algorithms applied to SEM micrographs captured before and after ion milling allows to conclude on stresses released. Residual stresse- - s can be computed with the help of appropriate, adjusted FEA models.
Keywords :
assembling; fatigue cracks; fracture; reliability; BEoL structures; SEM micrographs; Young´s modulus; advanced CMOS technologies; back-end of line layers; chip package interaction; crack interactions; crack paths; damage behavior; digital image correlation algorithms; electronic industry; fatigue resistance; feature sizes; focused ion beam equipment; functional integration; hardening; harsh operational conditions; interface fracture; ion milling; lead-free reflow-soldering; low-k BEoL stacks; low-k materials; material damaging; nanoindentation; nanometer range; nanoparticle filled materials; porous materials; reliability analysis; reliability estimations; reliability prediction; residual stresses; stress measurement; structural modifications; yield stress; Assembly; CMOS technology; Electronics industry; Electronics packaging; Environmentally friendly manufacturing techniques; Fatigue; Materials reliability; Nanostructured materials; Residual stresses; Virtual manufacturing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Thermal, Mechanical & Multi-Physics Simulation, and Experiments in Microelectronics and Microsystems (EuroSimE), 2010 11th International Conference on
Conference_Location :
Bordeaux
Print_ISBN :
978-1-4244-7026-6
Type :
conf
DOI :
10.1109/ESIME.2010.5464540
Filename :
5464540
Link To Document :
بازگشت