Development on integrated passive devices using wafer level package technologies

In recent years, as the demand for ever-smaller electronic systems grows, Industry trends are seeking ways to increase IC integration levels and to reduce the size and weight of IC packages. The explosive expansion of mobile electronic terminals generates strong demand for high-performance, cost-effective and miniaturized RF modules providing desired wireless connectivity. The chip scale package (CSP) and wafer-level packaging (WLP) resulting from this effort, have been introduced into industry at an unprecedented rate. Especially wafer level packaging technologies offer an interesting variety of different possibilities for the implementation of integrated passive components. In this context particularly the fabrication of integrated passive devices (IPDs) represents a promising solution regarding the reduction of size and assembly costs of systems in package (SiP). So, WL-IPDs technology will provide as integration and embedding technology of passive device in the systems in package(SiP). These IPDs combine different passive components (R, L, C) in one subcomponent to be assembled in one step by standard technologies like SMD or flip chip. In this paper the wafer level fabrication and electrical performance of such IPDs (WL-IPDs) will be discussed. We have developed the LPF (Low Pass Filter) in combination with spiral inductor and MIM (Metal-Insulator-Metal) Capacitor. Spiral inductor was demonstrated 8μm thick Cu film of inductor structure, to reduce the inductor resistance, and 20μm thick dielectric material, separates inductor structure and silicon wafer to reduce the substrate loss. The Quality factor is over 30 at 2 GHz with inductance of 0.6 nH. MIM Capacitor was fabricated using SI₃N₄ as Insulation material and the Unit capacitance obtained 1.08nF/mm². Also, Insertion loss of 0.14dB and 0.11dB for 3^rd order filter and 5^th order filter at 2.4 GHz respectively was achieved through both fron- - t-end process capable of high uniformity insulator deposition and back-end process capable of forming thick Cu RDL(Redistribution). A good matching between measured value and simulated one using 3D simulator was achieved.