Title :
Effect of 300 mm wafer and small lot size on final test process efficiency and cost of LSI manufacturing system
Author :
Nakamae, Koji ; Chikamura, Akihisa ; Fujioka, Hiromu
Author_Institution :
Dept. of Inf. Syst. Eng., Osaka Univ., Japan
Abstract :
The effect of lot size change on the current final test process efficiency and cost due to the transition of from conventional 5 or 6 inches to 300 mm (12 inches) in wafer size is evaluated through simulation analysis. Results show that high test efficiency and low test cost are maintained regardless of lot size in the 300 mm wafer range from one sheet to 25 sheets by using an appropriate dispatching rule and a small processing and moving lot size close to the batch size of testing equipment in the final test process
Keywords :
batch processing (industrial); inspection; integrated circuit economics; integrated circuit manufacture; integrated circuit testing; large scale integration; production testing; semiconductor process modelling; test equipment; 12 in; 300 mm; 5 in; 6 in; LSI manufacturing system; batch size; dispatching rule; final test cost; final test process; final test process efficiency; lot size; lot size change; moving lot size; processing lot size; simulation analysis; test cost; test efficiency; testing equipment; wafer size; wafer size transition; Costs; Inspection; Large scale integration; Logistics; Manufacturing processes; Microcomputers; Ovens; Production; Temperature; Testing;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1998. 1998 IEEE/SEMI
Conference_Location :
Boston, MA
Print_ISBN :
0-7803-4380-8
DOI :
10.1109/ASMC.1998.731478
