Title :
Effects of input bias on different commercial technological lines of CMOS inverters with respect to the cumulated dose
Author :
Quittard, O. ; Joffre, F. ; Oudéa, C. ; Dusseau, L. ; Fesquet, J. ; Gasiot, J.
Author_Institution :
CEA, Centre d´´Etudes Nucleaires de Saclay, Gif-sur-Yvette, France
Abstract :
The effects of input bias on the sensitivity to cumulative dose effects of 144 commercial CMOS inverters have been studied. The “worst case” irradiation conditions, as well as the most favorable case, have been inferred from these data. A saturation of the switching voltage shift had been measured for a null input bias. This effect appears to be due to the saturation of the NMOS and PMOS transistors threshold voltage shift for a null gate-to-source voltage
Keywords :
CMOS logic circuits; gamma-ray effects; hole traps; interface states; leakage currents; logic gates; radiation hardening (electronics); CMOS inverters; NMOS transistors; PMOS transistors; cumulative dose effects; different commercial technological lines; input bias effects; interface states; null gate-to-source voltage; null input bias; radiation induced leakage current; switching voltage shift saturation; threshold voltage shift; transfer functions; trapped holes; worst case irradiation conditions; CMOS technology; Current measurement; Inverters; Ionization; Ionizing radiation; Leakage current; MOS devices; MOSFETs; Semiconductor device manufacture; Threshold voltage;
Conference_Titel :
Radiation Effects Data Workshop, 1998. IEEE
Conference_Location :
Newport Beach, CA
Print_ISBN :
0-7803-5109-6
DOI :
10.1109/REDW.1998.731493
