DocumentCode :
2360551
Title :
Optimizing packet capture on symmetric multiprocessing machines
Author :
Varenni, Gianluca ; Baldi, Mario ; Degioanni, Loris ; Risso, Fulvio
Author_Institution :
Dipt. di Autom. e Inf., Politecnico di Torino, Italy
fYear :
2003
fDate :
10-12 Nov. 2003
Firstpage :
108
Lastpage :
115
Abstract :
Traffic monitoring and analysis based on general purpose systems with high speed interfaces, such as Gigabit Ethernet and 10 Gigabit Ethernet, requires carefully designed software in order to achieve the needed performance. One approach to attain such a performance relies on deploying multiple processors. This work analyses some general issues in multiprocessor systems that are particularly critical in the context of packet capture and network monitoring applications. More important, a new algorithm is proposed to coordinate multiple producers concurrently accessing a shared buffer, which is instrumental in packet capture on symmetrical multiprocessor machines.
Keywords :
buffer storage; concurrency theory; local area networks; multiprocessing systems; network interfaces; optimisation; performance evaluation; telecommunication traffic; Gigabit Ethernet; multiple producer coordination; network monitoring application; packet capture optimization; shared buffer; symmetric multiprocessing machine; traffic monitoring; Application software; Ethernet networks; Filtering; Hardware; Memory management; Monitoring; Network address translation; Performance analysis; Statistical analysis; Telecommunication traffic;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Computer Architecture and High Performance Computing, 2003. Proceedings. 15th Symposium on
Print_ISBN :
0-7695-2046-4
Type :
conf
DOI :
10.1109/CAHPC.2003.1250328
Filename :
1250328
Link To Document :
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