Experimental evaluation of trapping efficiency in silicon nitride based charge trapping memories

A characterization technique capable of measuring the electrical charge injected during programming operations in silicon nitride based charge trapping memories has been developed. The trapping efficiency, defined as the fraction of carriers which gets trapped in the device with respect to the total injected charge, is extracted and is evaluated along the programming transient for a wide set of devices, featuring different material deposition techniques and different thicknesses. The trapping efficiency is found to be almost insensitive to the injection conditions, whereas it depends on the quantity of filled traps, the thickness of the trapping layer and the conduction band offset between the trapping layer and the top oxide. A higher trapping efficiency in general leads to faster programming transients and more effective programming when increasing the gate voltage.