DocumentCode
2360749
Title
Transactional memory for dependable embedded systems
Author
Fetzer, Christof ; Felber, Pascal
Author_Institution
Dresden Univ. of Technol., Dresden, Germany
fYear
2011
fDate
27-30 June 2011
Firstpage
223
Lastpage
227
Abstract
Transactional Memory (TM) has been touted as one of the most promising approaches to concurrent programming for multi-core processors. By combining ease of use with high scalability potential, as well as checkpointing capabilities particularly useful for developing dependable software, TM has attracted considerable attention from the research community. Many of its facets have been studied over the last few years: hardware support, software TM runtimes, operating system extensions, transactional compilers, language extensions, or application workloads. On the basis of our experiences as designers and users of a complete TM stack that we developed over the last five years, we discuss in this position paper our view on the challenges one faces when extending TM to dependable embedded systems. Indeed, there is an apparent contradiction between the optimistic, best-effort operation of TM and the strict dependability requirements of embedded systems. Our position is that it is both possible and worthwhile to develop embedded transactional memory. Yet, we believe that in the context of dependable embedded systems the focus of TM should be on failure control and not concurrency control. Hence, this will require modifications of the TM language primitives, tools, algorithms, runtime systems, and hardware itself.
Keywords
concurrency control; embedded systems; multiprocessing programs; operating systems (computers); program compilers; checkpointing capabilities; dependable embedded systems; failure control; hardware support; language extensions; multicore processors; operating system extensions; runtime systems; software transactional memory runtimes; transactional compilers; Concurrency control; Context; Embedded systems; Hardware; Real time systems; Robustness; Transactional memory; concurrency; dependability; embedded systems;
fLanguage
English
Publisher
ieee
Conference_Titel
Dependable Systems and Networks Workshops (DSN-W), 2011 IEEE/IFIP 41st International Conference on
Conference_Location
Hong Kong
Print_ISBN
978-1-4577-0374-4
Electronic_ISBN
978-1-4577-0373-7
Type
conf
DOI
10.1109/DSNW.2011.5958817
Filename
5958817
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