WDSN keynote talk: “Stochastic computing: Embracing errors in architecture and design of processors and applications”

All of computing today relies on an abstraction where software expects the hardware to behave flawlessly for all inputs under all conditions. While the abstraction worked historically due to the relatively small magnitude of variations in hardware and environment, computing will increasingly be done with devices and circuits which are inherently stochastic or whose behavior is stochastic due to manufacturing and environmental uncertainties. For such emerging circuits/devices, the cost of maintaining the abstraction of flawless hardware will be prohibitive and we will need to fundamentally rethink the correctness contract between hardware and software. In our group, we are exploring a vision of computing systems where a) hardware and environmental variations are fully exposed to the highest layers of software in form errors, and b) hardware and software is optimized to maximize power savings afforded by relaxed correctness. We call the under-designed processors that produce stochastically correct results even under nominal conditions, stochastic processors. We call the applications that have been implemented to be adaptively error-tolerant, stochastic applications. In this talk, I will describe our recent approaches to architect and design stochastic processors and stochastic applications.