• DocumentCode
    2361265
  • Title

    Performance comparison of experimented switching architectures for ATM

  • Author

    Raatikainen, P. ; Oy, Teleste ; Zidbeck, Juha

  • fYear
    1996
  • fDate
    2-5 Sep 1996
  • Firstpage
    405
  • Lastpage
    411
  • Abstract
    This article surveys some interconnection networks, especially rings, utilized in broadband switching and compares their transfer delay performance. Special attention is paid to a ring, named Frame Synchronized Ring (FSR), which is developed for high speed switching and experimented as an ATM-switch. The study concentrates on analysing the transfer delay performance of the switching architectures to compare the rings with the other introduced switch structures (i.e. multidrop bus, crossbar, and multistage banyan network). The analysis is followed by some characteristics and experiments with the FSR
  • Keywords
    asynchronous transfer mode; multiprocessor interconnection networks; performance evaluation; ATM; ATM-switch; Frame Synchronized Ring; broadband switching; crossbar; interconnection networks; multidrop bus; multistage banyan network; switch structures; transfer delay performance; Asynchronous transfer mode; Communication switching; Costs; Delay; Information technology; Multiprocessor interconnection networks; Performance analysis; Switches; Telecommunication traffic; Traffic control;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    EUROMICRO 96. Beyond 2000: Hardware and Software Design Strategies., Proceedings of the 22nd EUROMICRO Conference
  • Conference_Location
    Prague
  • ISSN
    1089-6503
  • Print_ISBN
    0-8186-7487-3
  • Type

    conf

  • DOI
    10.1109/EURMIC.1996.546464
  • Filename
    546464