DocumentCode :
2361347
Title :
Statistical methods for measurement reduction in semiconductor manufacturing
Author :
Babikian, Richard ; Engelhard, Curt
Author_Institution :
Intel Ireland Ltd., Ireland
fYear :
1998
fDate :
23-25 Sep 1998
Firstpage :
212
Lastpage :
215
Abstract :
Measurement reduction in wafer fabrication represents a significant opportunity for cost reduction and improvement in operational efficiency. This translates into savings on test wafers, metrology equipment, technician time and throughput time. With ever-increasing process complexities and moves to 300 mm technology, measurement costs are increasingly becoming an area of focus to improve manufacturing efficiency. At Intel, statistical methodologies and management systems were developed to facilitate the reduction of measurements to reduce measurement costs
Keywords :
integrated circuit measurement; integrated circuit testing; integrated circuit yield; production testing; statistical analysis; cost reduction; manufacturing efficiency; measurement costs; measurement reduction; metrology equipment; operational efficiency; process complexity; semiconductor manufacturing; statistical management systems; statistical methodologies; statistical methods; technician time; test wafers; throughput time; wafer fabrication; wafer size; Costs; Frequency; Manufacturing processes; Monitoring; Risk management; Sampling methods; Semiconductor device manufacture; Statistical analysis; Statistics; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference and Workshop, 1998. 1998 IEEE/SEMI
Conference_Location :
Boston, MA
ISSN :
1078-8743
Print_ISBN :
0-7803-4380-8
Type :
conf
DOI :
10.1109/ASMC.1998.731556
Filename :
731556
Link To Document :
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