DocumentCode :
2361635
Title :
Understanding LER-induced statistical variability: A 35,000 sample 3D simulation study
Author :
Reid, Dave ; Millar, Campbell ; Roy, Gareth ; Roy, Scott ; Asenov, Asen
Author_Institution :
Dept. of Electron. & Electr. Eng., Univ. of Glasgow, Glasgow, UK
fYear :
2009
fDate :
14-18 Sept. 2009
Firstpage :
423
Lastpage :
426
Abstract :
We study, in detail, statistical threshold voltage variability in a state of the art n-channel MOSFET introduced by line edge roughness. A large sample of 35,000 transistors with microscopically different LER patterns was simulated using the Glasgow 3D `atomistic´ device simulator. Such large-scale simulation has been enabled by advanced grid computing technology. The results show that the statistical distribution of threshold voltage due to LER is asymmetric. Detailed analysis of the simulation results provide in depth understanding of the physical mechanisms governing LER induced statistical variability.
Keywords :
MOSFET; grid computing; semiconductor device models; statistical distributions; Glasgow 3D atomistic device simulator; LER patterns; advanced grid computing technology; large-scale simulation; line edge roughness; n-channel MOSFET; statistical distribution; statistical threshold voltage variability; Analytical models; Computational modeling; Grid computing; Large-scale systems; MOSFET circuits; Microscopy; Statistical distributions; Threshold voltage; Transistors; LER; MOSFET; numerical simulations; statistical analysis; variability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Solid State Device Research Conference, 2009. ESSDERC '09. Proceedings of the European
Conference_Location :
Athens
ISSN :
1930-8876
Print_ISBN :
978-1-4244-4351-2
Electronic_ISBN :
1930-8876
Type :
conf
DOI :
10.1109/ESSDERC.2009.5331515
Filename :
5331515
Link To Document :
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