Fabrication and characterization of vertically stacked Gate-All-Around Si Nanowire FET arrays

Author

Sacchetto, Davide ; Ben-Jamaa, M. Haykel ; De Micheli, G. ; Leblebici, Yusuf

Author_Institution

Integrated Syst. Lab. (LSI), Ecole Polytech. Fed. de Lausanne, Lausanne, Switzerland

fYear

2009

fDate

14-18 Sept. 2009

Firstpage

245

Lastpage

248

Abstract

We describe the fabrication of vertically Stacked Silicon Nanowire Field Effect Transistors (SiNW FETs) in Gate-All Around (GAA) configuration. Stacks with the number of channels ranging from 1 to 12 have been successfully produced by means of a micrometer scale lithography and conventional fabrication techniques. It is shown that demonstrator Schottky Barrier (SB) devices fabricated with Cr/NiCr contacts present good subthreshold slope (70 mV/dec), I_ON/I_OFF ratio ges 10⁴ and reproducible ambipolar behavior.

Keywords

Schottky barriers; chromium; chromium alloys; electrical contacts; elemental semiconductors; field effect transistors; nanoelectronics; nanolithography; nanowires; nickel alloys; semiconductor quantum wires; silicon; Schottky barrier device; Si-Cr-NiCr; metallic contacts; micrometer scale lithography; reproducible ambipolar property; silicon nanowire field effect transistors arrays; subthreshold slope; vertically stacked gate-all-around SiNW FET arrays; Chromium; Dielectric substrates; Etching; FETs; Isolation technology; Laboratories; Lithography; Optical device fabrication; Oxidation; Silicon on insulator technology; FET; ambipolar; multichannel; nanowire; vertical integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Solid State Device Research Conference, 2009. ESSDERC '09. Proceedings of the European

Conference_Location

Athens

ISSN

1930-8876

Print_ISBN

978-1-4244-4351-2

Electronic_ISBN

1930-8876

Type

conf

DOI

10.1109/ESSDERC.2009.5331516

Filename

5331516