DocumentCode
2362761
Title
Design of tunable folded cascode differential amplifier using PDM
Author
Mal, Ashis Kumar ; Todani, Rishi ; Hari, Om Prakash
Author_Institution
ECE Dept., NIT Durgapur, Durgapur, India
fYear
2011
fDate
20-23 March 2011
Firstpage
296
Lastpage
301
Abstract
Operational Amplifiers (op-amps) are one of the most commonly used blocks in analog and mixed signal VLSI design. Designers often spend considerable time in designing op-amps analytically, and then realize that the simulated circuits do not match with analytical expectations. This is primarily due to modeling of short channel MOS devices using long channel equations. Finally an adhoc mechanism is adopted to realize the op-amp with the help of a simulator. Proposed Potential Distribution Method (PDM) is a method where the design methodology is based on actual behavior of the devices and it is free from any analytical expression. This paper demonstrates the design approach for realizing a fully differential folded cascode op-amp using PDM, which is based on simulator results obtained with predefined bias conditions. The dependency of various performance parameters, like slew rate (SR), unity gain bandwidth (UGB), phase margin (PM), etc. on potentials and current distribution at different nodes is presented. It is found that using these dependencies, the target specifications for an op-amp can be achieved with shorter design time. Also, fine tuning the performance metric can be achieved using PDM. Finally, a fully differential folded cascode op-amp is thus designed and the simulation results are presented.
Keywords
MIS devices; VLSI; cascade networks; differential amplifiers; mixed analogue-digital integrated circuits; network synthesis; operational amplifiers; analog signal VLSI design; differential folded cascode op-amp; fully differential folded cascode op-amp; mixed signal VLSI design; operational amplifiers; phase margin; potential distribution method; short channel MOS devices; slew rate; tunable folded cascode differential amplifier; unity gain bandwidth; Bandwidth; Electric potential; Gain; Logic gates; MOS devices; Threshold voltage; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Computers & Informatics (ISCI), 2011 IEEE Symposium on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-61284-689-7
Type
conf
DOI
10.1109/ISCI.2011.5958930
Filename
5958930
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