Performance and productivity improvements in an advanced dielectric etch reactor for sub 0.3 μm applications

Dielectric film etching represents one of the most challenging aspects of semiconductor processing. At present, a dielectric etch reactor must be capable of handling a range of dielectrics, such as doped and undoped silica glass, silicon nitride, organic anti-reflection layers and low-k dielectric materials of a predominantly organic composition. Successful etch tools perform the “critical” steps required for contact, self-aligned contact (SAC), via and dual damascene structures as well as the less critical steps such as spacers and passivation that are required by leading edge 0.25 μm generation devices as they enter volume production. Finally, all the etches must be cost effective as measured with the standard metrics of cost of ownership (COO), and overall equipment effectiveness (OEE). In this paper, we describe how these metrics have been used to generate several product improvement programs for an advanced dielectric reactor, the 4520XL_E^TM from Lam Research. Both process and productivity improvements are shown for sub-0.3 μm feature size devices. These improvements show promise for extension of the applicability of the 4520XL_E reactor to sub-0.2 μm feature sizes