FPGA implementation of a MIMO receiver front-end for the UMTS downlink

Multiple input/multiple output (MIMO) systems have received great attention to boost the capacity of wireless communication systems. Multiple antennas at the transmitter and receiver are used to exploit the spatial diversity in a rich scattering environment to concurrently transmit multiple data streams in the same frequency band thereby increasing spectral efficiency. Besides the actual MIMO decoder a significant part of the implementation complexity of such a system turns out to be in the receiver front-end. In this paper an efficient implementation of a MIMO receiver frontend based on a modified FDD UMTS downlink is presented. A new method for the efficient realization of a MIMO channel estimation is being introduced. The implementation of the RAKE receiver as well as the frequency-offset estimation is also discussed