Title :
Design of a hybrid digital-analog neural co-processor for signal processing
Author :
Romariz, A.R.S. ; Ferreira, P.U.A. ; Campelo, J.V., Jr. ; Graciano, M.L., Jr. ; da Costa, J.C.
Author_Institution :
Dept. de Engenharia Eletrica, Brasilia Univ., Brazil
Abstract :
A hybrid architecture for neural coprocessing is presented. A fixed set of analog multipliers and capacitors (analog memory) emulates multilayer perceptrons through digitally-controlled multiplexing. Thus parallelism is partially preserved without direct analog implementation of the whole structure. Details of system VLSI implementation are given, along with simulation results and performance estimation
Keywords :
CMOS analogue integrated circuits; VLSI; coprocessors; digital signal processing chips; multilayer perceptrons; neural chips; signal processing; CMOS analog circuits; VLSI design; VLSI implementation; analog multipliers; capacitors; digitally-controlled multiplexing; hybrid architecture; hybrid digital-analog neural co-processor; multilayer perceptrons; signal processing; Analog memory; Capacitors; Circuits; Control systems; Coprocessors; Digital-analog conversion; Multilayer perceptrons; Neurons; Parallel processing; Signal design;
Conference_Titel :
EUROMICRO 96. Beyond 2000: Hardware and Software Design Strategies., Proceedings of the 22nd EUROMICRO Conference
Conference_Location :
Prague
Print_ISBN :
0-8186-7487-3
DOI :
10.1109/EURMIC.1996.546477
