Title :
A FPGA based square-root coprocessor
Author :
Tchoumatchenko, V. ; Vassileva, T. ; Gurov, P.
Author_Institution :
Dept. of Electron., Tech. Univ. Sofia, Bulgaria
Abstract :
We present an FPGA implementation of a non-restoring integer square-root algorithm, that uses estimates for result-digit selection and radix-2 redundant addition in recurrence. On-the-fly conversion of the result-digit and signed-digit adder/substractor are used to simplify the hardware realization. Modifications of the equations for th optimal use of Xilinx CLBs, and the necessary CLB resources for different bit-length calculations are outlined, for the XC3000 family
Keywords :
coprocessors; digital arithmetic; field programmable gate arrays; FPGA based square-root coprocessor; XC3000 family; Xilinx CLBs; bit-lengths; nonrestoring integer square-root algorithm; radix-2 redundant addition; result-digit selection; Adders; Algorithm design and analysis; Arithmetic; Capacitive sensors; Coprocessors; Delay; Electronics packaging; Field programmable gate arrays; Hardware; Process design;
Conference_Titel :
EUROMICRO 96. Beyond 2000: Hardware and Software Design Strategies., Proceedings of the 22nd EUROMICRO Conference
Conference_Location :
Prague
Print_ISBN :
0-8186-7487-3
DOI :
10.1109/EURMIC.1996.546478
