DocumentCode :
2364226
Title :
[Title page i]
fYear :
2009
fDate :
5-9 Jan. 2009
Abstract :
The following topics are dealt with: low power design; wireless communication; SoC verification; fault diagnosis; analog layout; mixed signal; floorplanning; network on chip; application-specific architectures; reconfigurable computing; embedded system; SRAM; random number generation; reliability; BIST; advanced nanodevice modeling and phase locked loops.
Keywords :
VLSI; analogue circuits; built-in self test; fault diagnosis; integrated circuit layout; integrated circuit reliability; low-power electronics; nanoelectronics; phase locked loops; radiocommunication; system-on-chip; BIST; SRAM; SoC verification; VLSI design; advanced nanodevice modeling; analog layout; application-specific architecture; circuit reliability; fault diagnosis; floorplanning; low power design; network on chip; phase locked loops; random number generation; reconfigurable computing; wireless communication;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Design, 2009 22nd International Conference on
Conference_Location :
New Delhi
ISSN :
1063-9667
Print_ISBN :
978-0-7695-3506-7
Type :
conf
DOI :
10.1109/VLSI.Design.2009.1
Filename :
4749612
Link To Document :
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