DocumentCode :
2364251
Title :
Circuit for logical-binary functions using MOS floating-gate devices
Author :
Santiago, A. Medina ; Barranca, M. A Reyes
Author_Institution :
Dept. of Electr. Eng., CINVESTAV-IPN, Mexico City, Mexico
fYear :
2005
fDate :
7-9 Sept. 2005
Firstpage :
211
Lastpage :
214
Abstract :
We have designed a logical external configuration circuit in which a highly-functional device called Neuron MOS Transistor (vMOS) is utilized as a key component. A dramatic reduction in the number of transistors as well as in complexity of interconnections has been achieved by the new circuit configuration using vMOS. In this work, simulations of our circuit of logical external configuration are presented using PSpice and we included the elimination of input-stage D/A converter like proposal to future. This circuit is able to represent the logic functions: AND, OR, NAND, NOR, Exclusive-NOR, Exclusive-OR, among others, with a 4-bits input option.
Keywords :
MOS logic circuits; circuit simulation; logic design; neural chips; AND; D/A converter; MOS floating-gate devices; NAND; NOR; NeuMOS; Neuron MOS Transistor; OR; PSpice; circuit simulation; exclusive-NOR; exclusive-OR; floating-gate potential diagram; interconnection complexity; logic functions; logical external configuration circuit; logical-binary function circuit; neuron circuit; programmable inverter; vMOS; Boolean functions; Circuit analysis; Cities and towns; IEEE catalog; Inverters; MOSFETs; Neurons; Parasitic capacitance; Solid state circuits; Voltage; CMOS; D/A converter; Floating-gate; Floating-gate Potential Diagram; NeuMOS; logical external configuration circuit; neuron circuit; programmable inverter;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical and Electronics Engineering, 2005 2nd International Conference on
Print_ISBN :
0-7803-9230-2
Type :
conf
DOI :
10.1109/ICEEE.2005.1529610
Filename :
1529610
Link To Document :
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