DocumentCode :
2364395
Title :
Pedestal collector optimization for high speed SiGe:C HBT
Author :
Van Huylenbroeck, S. ; Sibaja-Hernandez, A. ; Venegas, R. ; You, S. ; Vleugels, F. ; Radisic, D. ; Lee, W. ; Vanherle, W. ; De Meyer, K. ; Decoutere, S.
Author_Institution :
IMEC, Leuven, Belgium
fYear :
2011
fDate :
9-11 Oct. 2011
Firstpage :
66
Lastpage :
69
Abstract :
An optimized collector doping profile for high-speed SiGe:C HBT devices is presented. A thin and abrupt collector pedestal is implemented in a fT/fMAX 245GHz/460GHz fully self-aligned HBT architecture.
Keywords :
Ge-Si alloys; carbon; heterojunction bipolar transistors; optimisation; SiGe:C; frequency 245 GHz; frequency 460 GHz; fully self-aligned HBT architecture; high-speed HBT device; optimized collector doping profile; thin abrupt collector pedestal optimization; Capacitance; Doping profiles; Heterojunction bipolar transistors; Performance evaluation; Silicon; Silicon bipolar process technology; hetero-junction bipolar transistor (HBT); millimeter-wave bipolar transistor; silicongermanium (SiGe);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2011 IEEE
Conference_Location :
Atlanta, GA
ISSN :
1088-9299
Print_ISBN :
978-1-61284-165-6
Type :
conf
DOI :
10.1109/BCTM.2011.6082750
Filename :
6082750
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2364395
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