Title :
A low-power bootstrapped CMOS full adder
Author :
Hernández, M. Aguirre ; Aranda, M. Linares
Author_Institution :
Dept. of Electron., INAOE, Puebla, Mexico
Abstract :
In this paper, a CMOS full adder built upon bootstrapped pass transistor logic is presented. With the characteristics of full voltage swing at internal nodes and very low short circuit current, HSPICE and Nanosim simulations shown that the proposed full adder offers a power-delay improvement of 36% over the best of other 1-bit full adders that were compared. A 0.35 μm CMOS technology and a power supply of 3.3.V were used to simulate these adders. When used to build an 8-bits carry-ripple adder, the proposed full adder offers power savings up to 28% respect to the other ones.
Keywords :
CMOS logic circuits; SPICE; adders; bootstrap circuits; low-power electronics; 0.35 micron; 1 bit; 3.3 V; 8 bit; CMOS technology; HSPICE simulation; Nanosim simulation; XOR-XNOR; carry-ripple adder; full adders; full voltage swing; low-power bootstrapped CMOS full adder; power savings; Adders; Analytical models; CMOS logic circuits; Degradation; Energy consumption; Inverters; Power dissipation; Propagation delay; Testing; Voltage; XOR-XNOR; bootstrap; full adder; low-power;
Conference_Titel :
Electrical and Electronics Engineering, 2005 2nd International Conference on
Print_ISBN :
0-7803-9230-2
DOI :
10.1109/ICEEE.2005.1529618
