DocumentCode :
2364846
Title :
DSP source code optimization of BPSK/QPSK receiver symbol synchronization recovery circuit
Author :
Vasilevskiy, Valentin ; Panyushkin, Vladimir ; Puzyrev, Pavel
Author_Institution :
Radio Eng. Dept., Omsk State Tech. Univ., Omsk, Russia
fYear :
2011
fDate :
25-27 April 2011
Firstpage :
208
Lastpage :
212
Abstract :
An optimization of TMS320VC55XX digital signal processor series program code of symbol synchronization scheme of software defined BPSK/QPSK receiver is discussed. A detailed description of optimization process is delivered, optimized program code of Farrow interpolator and numerically controlled oscillator is given.
Keywords :
digital signal processing chips; interpolation; optimisation; oscillators; radio receivers; software radio; source coding; synchronisation; BPSK/QPSK receiver symbol synchronization recovery circuit; DSP source code optimization; Farrow interpolator; TMS320VC55XX; digital signal processor series program code; numerically controlled oscillator; optimized program code; software defined BPSK/QPSK receiver; Digital signal processing; Finite impulse response filter; Mathematical model; Optimization; Synchronization; Transversal filters; digital signal processing; numerical efficiency; optimization; software defined receiver; symbol synchronization recovery;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2011 International Conference on
Conference_Location :
Kuala Lumpur
ISSN :
2159-2047
Print_ISBN :
978-1-61284-388-9
Type :
conf
DOI :
10.1109/ICEDSA.2011.5959041
Filename :
5959041
Link To Document :
https://search.ricest.ac.ir/dl/search/defaultta.aspx?DTC=49&DC=2364846
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