DocumentCode
2364982
Title
Improving parasitic emitter resistance determination methods for advanced SiGe:C HBT transistors
Author
Raya, C. ; Ardouin, B. ; Huszka, Z.
Author_Institution
XMOD Technol., Bordeaux, France
fYear
2011
fDate
9-11 Oct. 2011
Firstpage
191
Lastpage
194
Abstract
Determination methods for the emitter resistance of bipolar transistors are reviewed and evaluated with respect to the constraints introduced by modern SiGe:C HBT processes with fMAX reaching 500GHz [1]. Maximum transistor performance is obtained at ever higher current densities, involving huge self-heating effect which dramatically degrades the accuracy of existing methods. A new parameter extraction procedure is presented and compared to existing solutions. Finally, a simple methodology to correct self-heating effects is proposed, which advantageously increases the accuracy of emitter resistance determination under high self-heating conditions.
Keywords
Ge-Si alloys; carbon; current density; heterojunction bipolar transistors; HBT transistor; SiGe:C; current density; frequency 500 GHz; maximum transistor performance; parameter extraction procedure; parasitic emitter resistance determination method; self-heating effect; Accuracy; Electrical resistance measurement; Equations; Heterojunction bipolar transistors; Mathematical model; Parameter extraction; Resistance; HBT; bipolar/BiCMOS; modeling; parameter extraction; parasitic emitter resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2011 IEEE
Conference_Location
Atlanta, GA
ISSN
1088-9299
Print_ISBN
978-1-61284-165-6
Type
conf
DOI
10.1109/BCTM.2011.6082779
Filename
6082779
Link To Document