Impact of simultanous switching noise on packaged mixed SoC

Increasing numbers of high-density and high-speed mixed circuits has been integrated on a single chip, while the devices are becoming more sensitive to the simultanous switching noise. In this paper,a chip-package co-design method is presented for co-design of chip and package. Based on the analysis of simulation result of package and chip, a special circuit which is composed of resistors and capacitor is designed on chip to decrease the affect of simultaneous switch noise. The simulation shows an excellent agreement with measurement within a 1% margin.