DocumentCode :
2365247
Title :
A very-high resolution VLSI Loser-Take-All (LTA) circuit for neural networks and fuzzy systems
Author :
Padash, Mohsen ; Mashoufi, Behbood ; Taji, Ayatollah ; Hatami, Hosein
Author_Institution :
Microelectron. Res. Lab., Urmia Univ., Urmia, Iran
fYear :
2011
fDate :
25-27 April 2011
Firstpage :
225
Lastpage :
228
Abstract :
In this paper we have proposed a novel Loser-Take-All (LTA) circuit with very high resolution. LTA is one of the building blocks of neural architectures and Fuzzy logic. Proposed LTA circuit is working properly for the input voltages with the difference of 10 μv, meaning the resolution is 50 times higher than the previous works. The proposed circuit is designed in 0.35 um CMOS technology, while the layout was drawn by Cadence Virtuoso and the simulation results are given by using Hspice (level=49) software.
Keywords :
CMOS integrated circuits; SPICE; VLSI; fuzzy neural nets; neural chips; CMOS technology; Cadence Virtuoso; Hspice; fuzzy systems; neural networks; size 0.35 mum; very-high resolution VLSI loser-take-all circuit; Artificial neural networks; CMOS integrated circuits; Computer architecture; Layout; Microprocessors; Transistors; Very large scale integration; Fuzzy systems; analog circuits; loser-take-all (LTA); neural network hardware;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic Devices, Systems and Applications (ICEDSA), 2011 International Conference on
Conference_Location :
Kuala Lumpur
ISSN :
2159-2047
Print_ISBN :
978-1-61284-388-9
Type :
conf
DOI :
10.1109/ICEDSA.2011.5959063
Filename :
5959063
Link To Document :
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