Title :
TIGUAN: Thread-Parallel Integrated Test Pattern Generator Utilizing Satisfiability ANalysis
Author :
Czutro, Alejandro ; Polian, Ilia ; Lewis, Matthew ; Engelke, Piet ; Reddy, Sudhakar M. ; Becker, Bernd
Author_Institution :
Inst. for Comput. Sci., Albert-Ludwigs-Univ., Freiburg
Abstract :
We present the automatic test pattern generator TIGUAN based on a thread-parallel SAT solver. Due to a tight integration of the SAT engine into the ATPG algorithm and a carefully chosen mix of various optimization techniques, multi-million-gate industrial circuits are handled without aborts. TIGUAN supports both conventional single-stuck-at faults and sophisticated conditional multiple stuck-at faults which allows to generate patterns for non-standard fault models.
Keywords :
automatic test pattern generation; circuit optimisation; computability; fault diagnosis; parallel processing; ATPG algorithm; SAT engine; TIGUAN; automatic test pattern generator; multimillion-gate industrial circuits; multiple stuck-at faults; nonstandard fault models; optimization techniques; satisfiability analysis; single-stuck-at faults; thread-parallel SAT solver; thread-parallel integrated test pattern generator; Automatic test pattern generation; Circuit faults; Circuit testing; Cities and towns; Computer science; Engines; Pattern analysis; Test pattern generators; Very large scale integration; ATPG; SAT; non-standard fault models;
Conference_Titel :
VLSI Design, 2009 22nd International Conference on
Conference_Location :
New Delhi
Print_ISBN :
978-0-7695-3506-7
DOI :
10.1109/VLSI.Design.2009.20
