DocumentCode
2365894
Title
Systematic Methodology for High-Level Performance Modeling of Analog Systems
Author
Pandit, Soumya ; Mandal, Chittaranjan ; Patra, Amit
Author_Institution
Meghnad Saha Inst. of Technol., Kolkata
fYear
2009
fDate
5-9 Jan. 2009
Firstpage
361
Lastpage
366
Abstract
This paper presents a systematic methodology for construction of high-level performance models using least squares support vector machine. The transistor sizes of the circuit-level implementation of a component block along with a set of geometry constraints applied over them define the sample space. Optimal values of the model hyper parameters are computed using genetic algorithm. The novelty of the methodology is that the models constructed with this methodology are accurate, fast to evaluate with good generalization ability and low construction time. The present methodology has been compared with two other standard methodologies and the novelties are clearly demonstrated with experimental results.
Keywords
analogue integrated circuits; circuit CAD; genetic algorithms; high level synthesis; integrated circuit design; least squares approximations; support vector machines; analog systems; circuit-level implementation; generalization; genetic algorithm; high-level performance modeling; least squares support vector machine; transistor size; Analog circuits; Circuit simulation; Design methodology; Design optimization; Least squares methods; Optimization methods; Space technology; Support vector machines; Switches; Topology; High-Level Analog Synthesis; Least Squares Support Vector Machine; Performance Modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
VLSI Design, 2009 22nd International Conference on
Conference_Location
New Delhi
ISSN
1063-9667
Print_ISBN
978-0-7695-3506-7
Type
conf
DOI
10.1109/VLSI.Design.2009.26
Filename
4749700
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