• DocumentCode
    2366183
  • Title

    RADJAM: A Novel Approach for Reduction of Soft Errors in Logic Circuits

  • Author

    Bhattacharya, Koustav ; Ranganathan, Nagarajan

  • Author_Institution
    Dept. of Comput. Sci. & Eng, Univ. of South Florida, Tampa, FL
  • fYear
    2009
  • fDate
    5-9 Jan. 2009
  • Firstpage
    453
  • Lastpage
    458
  • Abstract
    The task of achieving reliability against transient faults poses a significant challenge due to technology scaling trends. Several optimization techniques have been proposed in the literature for preventing soft errors in logic circuits. However, most approaches for avoiding soft errors in logic circuits have significant overheads in terms of delay, area or power. In this work, we propose a circuit level technique called RADJAM (RADiation JAMmer) to prevent soft errors, occurring due to radiation strikes, in logic cells. The RADJAM circuit when inserted at the output of a logic can reduce the generation of transient glitches significantly. Further, we propose an algorithm to insert RADJAM cells on selective nodes in a logic circuit. The algorithm uses signal logic probabilities and circuit slack for insertion of RADJAM cells on circuit nodes, thus improving the reliability of the logic circuit with minimal impact on the overall circuit delay. The proposed algorithm has been implemented and validated on the ISCAS85 benchmarks. Experimental results indicate that RADJAM optimized logic circuits can reduce soft error rates by around 39% with marginal delay, area and power overheads.
  • Keywords
    circuit reliability; logic circuits; transients; ISCAS85 benchmarks; RADJAM; circuit nodes; logic cells; logic circuits; power overheads; radiation jammer; reliability; soft errors; transient faults; transient glitches; Circuit faults; Combinational circuits; Computer errors; Delay; Electromagnetic transients; Logic circuits; Low pass filters; Redundancy; Space technology; Voltage; Reliable Circuit Design; Selective Node Hardening; Soft Errors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Design, 2009 22nd International Conference on
  • Conference_Location
    New Delhi
  • ISSN
    1063-9667
  • Print_ISBN
    978-0-7695-3506-7
  • Type

    conf

  • DOI
    10.1109/VLSI.Design.2009.76
  • Filename
    4749714