Non-linear cellular automata based PRPG design (without prohibited pattern set) in linear time complexity

Author

Das, Sukanta ; Kundu, Anirban ; Sen, Subhayan ; Sikdar, Biplab K. ; Chaaudhuri

Author_Institution

Dept. of Comput. Sci. & Technol., Bengal Eng. Coll., Howrah, India

fYear

2003

fDate

16-19 Nov. 2003

Firstpage

78

Lastpage

83

Abstract

This paper reports an efficient BIST solution for VLSI circuits. The solution is based on an onchip Pseudo-Random Pattern Generator (PRPG). The test solution guarantees non-issuence of the test patterns declared prohibited to a CUT (Circuit Under Test). It has been developed around non-linear Cellular Automata (CA) and provides a linear time solution of designing an n-bit PRPG. Experimental results confirm the enhanced pseudo-random quality of the test patterns due to application of non-linear CA rules.

Keywords

VLSI; automatic test pattern generation; built-in self test; cellular automata; circuit complexity; integrated circuit design; integrated circuit testing; state assignment; VLSI circuits; efficient BIST; group rules; linear time solution; nonlinear cellular automata; on-chip pseudo-random pattern generator; pseudo-random test patterns; state function; state transition diagram; Automatic testing; Cellular automata; Integrated circuit design; Integrated circuit testing; Self-testing; State assignment; Very-large-scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Test Symposium, 2003. ATS 2003. 12th Asian

ISSN

1081-7735

Print_ISBN

0-7695-1951-2

Type

conf

DOI

10.1109/ATS.2003.1250787

Filename

1250787