DocumentCode :
236747
Title :
On-chip voltage regulator module (VRM) effect on power/ground noise and jitter at high-speed output buffer
Author :
Heegon Kim ; Jingook Kim ; Achkir, Brice ; Changwook Yoon ; Jun Fan
Author_Institution :
TERA Lab., Korea Adv. Inst. of Sci. & Technol., Daejeon, South Korea
fYear :
2014
fDate :
4-8 Aug. 2014
Firstpage :
75
Lastpage :
80
Abstract :
On-chip voltage regulator module (VRM) for the reduction of power/ground noise on power distribution network (PDN) and jitter minimization at high-speed output buffer is introduced. The basic topology and optimized operation for on-chip VRM is analyzed. A PDN with on-chip VRM shows reduced power/ground noise through removing additional effects coming from package/PCB PDN. Also, when on-chip VRM is implemented on PDN of high-speed output buffers, jitter at output signal is lower. Improvements on PDN and jitter through on-chip VRM are shown and validated with SPICE simulation with 110nm CMOS technology library.
Keywords :
CMOS integrated circuits; buffer circuits; distribution networks; interference suppression; system-on-chip; timing jitter; voltage regulators; CMOS technology; PCB PDN; SPICE simulation; VRM Effect; ground noise reduction; high-speed output buffer; jitter minimization; on-chip voltage regulator module effect; power distribution network; power noise reduction; size 110 nm; Capacitance; Integrated circuit modeling; Jitter; Noise; Switches; Switching frequency; System-on-chip; jitter; on-chip voltage regulator module (VRM); power distribution network; power/ground noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electromagnetic Compatibility (EMC), 2014 IEEE International Symposium on
Conference_Location :
Raleigh, NC
Print_ISBN :
978-1-4799-5544-2
Type :
conf
DOI :
10.1109/ISEMC.2014.6898946
Filename :
6898946
Link To Document :
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