DocumentCode :
2367535
Title :
Wafer thinning, bonding, and interconnects induced local strain/stress in 3D-LSIs with fine-pitch high-density microbumps and through-Si vias
Author :
Murugesan, M. ; Kino, H. ; Nohira, H. ; Bea, J.C. ; Horibe, A. ; Yamada, F. ; Miyazaki, C. ; Kobayashi, H. ; Fukushima, T. ; Tanaka, T. ; Koyanagi, M.
Author_Institution :
New Ind. Creation Hatchery Center, Tohoku Univ., Sendai, Japan
fYear :
2010
fDate :
6-8 Dec. 2010
Abstract :
Mechanical strain/stress and crystal defects are produced in extremely thin wafers (thickness ~10 μm) of 3D-LSIs not only during wafer thinning, but also after wafer bonding using fine-pitch, high-density microbumps and curing. Furthermore, the metal of through-Si via (TSV) and microbump not only becomes the cause of contamination, but also induces strain/stress (due to the difference in the co-efficient of thermal expansion (CTE) between Si and metal) in thinned Si substrate. X-ray photoelectron spectroscopy (XPS) results showed that the crystal quality of Si is highly deteriorated in the ultra-poly ground (UPG) surface after wafer thinning and stress relief. Micro-Raman spectroscopy (μRS) data revealed that a local tensile strain amount to 1.8 GPa was induced by 4×4 μm2 square sized Si microbumps in 10 μm-thick LSI wafers after bonding and curing. We have noticed that this locally induced strain/stress caused more than 10% change in the ON current of p-MOS transistor. CuSn microbumps have also induced strain/stress at Si wafer surface, and it penetrates deeper for larger bump size and wider for smaller bump pitch.
Keywords :
MOSFET; Raman spectra; X-ray photoelectron spectra; copper alloys; crystal defects; curing; fine-pitch technology; integrated circuit interconnections; large scale integration; solders; thermal expansion; three-dimensional integrated circuits; tin alloys; wafer bonding; 3D-LSI; CuSn; CuSn microbumps; Si; Si substrate; X-ray photoelectron spectroscopy; crystal defects; curing; fine-pitch high-density microbumps; local tensile strain; mechanical strain/stress; microRaman spectroscopy; p-MOS transistor; thermal expansion coefficient; through-Si vias; ultra-poly ground surface; wafer bonding; wafer interconnects; wafer thinning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electron Devices Meeting (IEDM), 2010 IEEE International
Conference_Location :
San Francisco, CA
ISSN :
0163-1918
Print_ISBN :
978-1-4424-7418-5
Electronic_ISBN :
0163-1918
Type :
conf
DOI :
10.1109/IEDM.2010.5703279
Filename :
5703279
Link To Document :
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