DocumentCode
2367619
Title
Investigation of silicon NC memory with improved threshold voltage window
Author
Kuang, Yongbian ; Li, Yan ; Wu, Dake ; Yu, Zhe ; Tang, Ruyan ; Huang, Ru
Author_Institution
Inst. of Microelectron., Peking Univ., Beijing
fYear
2008
fDate
24-27 March 2008
Firstpage
593
Lastpage
596
Abstract
Memory capacitors with the structure of thin tunneling oxide layer/silicon nanocrystal (NC) layer/thick controlling oxide layer were fabricated by both LPCVD method and low energy ion implantation method. The silicon NC formation condition, its size and density which have great influence on silicon NC memory characteristics are experimentally investigated in this paper. Silicon NC memory with a 2V threshold voltage window was obtained by optimized silicon ion implantation technology, which is beneficial to the practical application of the silicon NC memory device.
Keywords
capacitors; chemical vapour deposition; elemental semiconductors; ion implantation; nanoelectronics; nanostructured materials; nanotechnology; semiconductor growth; silicon; Si; low energy ion implantation; low pressure chemical vapor deposition; memory capacitors; nanocrystal; thin tunneling oxide layer; threshold voltage; Nanoelectronics; Silicon; Threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Nanoelectronics Conference, 2008. INEC 2008. 2nd IEEE International
Conference_Location
Shanghai
Print_ISBN
978-1-4244-1572-4
Electronic_ISBN
978-1-4244-1573-1
Type
conf
DOI
10.1109/INEC.2008.4585557
Filename
4585557
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