Title :
Self-aligned High Density Low Voltage P-Channel Trench MOSFET with Ultra Low Resistance and Robust Ruggedness
Author :
Kocon, Christopher ; Challa, Ashok ; Thorup, Paul
Author_Institution :
Fairchild Semicond.
Abstract :
The presented device structure offers novel features of recessed interlevel dielectric (ILD) into the active device trench and perpendicular N+ body design. This allows for the device self alignment and unit size shrink to 1mum and below without compromising gate and device switching ruggedness. Key parameter optimization achieved is the device on-resistance while ensuring robust avalanche energy capability. The additional device trade-off of trench depth and its implication of on-resistance vs. breakdown voltage is also being considered. The optimized for commercial application version of the proposed device structure has achieved 30 V blocking voltage with 25V gate rating and the best in the class specific on-resistance (rsp) of 17mohm*mm2
Keywords :
dielectric materials; power MOSFET; 1 micron; 25 V; 30 V; active device trench; device self alignment; device switching ruggedness; p-channel trench MOSFET; perpendicular N+ body design; recessed interlevel dielectric; Breakdown voltage; Dielectrics; Etching; Immune system; Implants; Low voltage; MOSFET circuits; Power MOSFET; Robustness; Silicon;
Conference_Titel :
Power Semiconductor Devices and IC's, 2006. ISPSD 2006. IEEE International Symposium on
Conference_Location :
Naples
Print_ISBN :
0-7803-9714-2
DOI :
10.1109/ISPSD.2006.1666081
