DocumentCode :
2367739
Title :
Average leakage current macromodeling for dual-threshold voltage circuits
Author :
Xu, Yongjun ; Luo, Zuying ; Chen, Zhiguo ; Li, Xiaowei
Author_Institution :
Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing, China
fYear :
2003
fDate :
16-19 Nov. 2003
Firstpage :
196
Lastpage :
201
Abstract :
Dual threshold voltage design is the most effective technique for reducing leakage current of integrated circuits. In this paper, we put forward an average leakage current macromodeling for dual-threshold circuits and propose two methods to conquer it, table-lookup based simulation and statistical analysis. The simulation is an efficient general-purposed method for leakage current estimation. For stochastic input circuits, a new statistical method is presented, which is much faster than the former one and can be used for very large circuits, because the method is based on input Signal probability and only one pass of circuit is needed. To validate these two methods, accurate leakage currents are also calculated using popular simulator HSPICE for comparison. Experiments on ISCAS85 and ISCAS89 benchmarks demonstrate that the errors between them can be limited under 4% and thousand folds of time to results can be saved.
Keywords :
CMOS logic circuits; SPICE; VLSI; fault simulation; integrated circuit design; integrated circuit modelling; integrated circuit testing; leakage currents; logic CAD; logic simulation; table lookup; CMOS VLSI; HSPICE; average leakage current macromodeling; dual-threshold voltage circuits; gate-level simulation; leakage current simulation; signal probability propagation; stack effect; statistical analysis; stochastic input circuits; subthreshold current; table-lookup based simulation; CMOSFET logic devices; Circuit simulation; Computers; Design automation; Diodes; Integrated circuit design; Integrated circuit modeling; Integrated circuit technology; Integrated circuit testing; Leakage current; Leakage currents; Probability; SPICE; Statistical analysis; Subthreshold current; Table lookup; Threshold voltage; Tunneling; Very-large-scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium, 2003. ATS 2003. 12th Asian
ISSN :
1081-7735
Print_ISBN :
0-7695-1951-2
Type :
conf
DOI :
10.1109/ATS.2003.1250809
Filename :
1250809
Link To Document :
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